Part Number Hot Search : 
CS51411 IPD60 CS51411 00BZI MMBZ5240 1MC06103 1E473 31818
Product Description
Full Text Search
 

To Download 1206J0500104MXRE03 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  x2y the syfer balanced line chip is a 3 terminal emi chip device. the revolutionary design provides simultaneous line-to-line and line-to- ground filtering, using a single ceramic chip. in this way, differential and common mode filtering are provided in one device. capable of replacing 2 or more conventional devices, it is ideal for balanced lines, twisted pairs and dc motors, in automotive, audio, sensor and other applications. these filters can prove invaluable in meeting stringent emc demands particularly in automotive applications. specifications w t l2 l l1 chip size l w t l1 l2 0603* 1.60.2 (0.0630.008) 0.80.2 (0.030.008) 0.50.15 (0.020.006) 0.30.2 (0.0120.008) 0.20.1 (0.0080.004) 0805 2.00.3 (0.080.012) 1.250.2 (0.050.008) 1.00.15 (0.040.006) 0.50.25 (0.020.01) 0.30.15 (0.0120.006) 1206 3.20.3 (0.1260.012) 1.600.2 (0.0630.008) 1.10.2 (0.0430.008) 0.950.3 (0.0370.012) 0.50.25 (0.020.01) 1410 3.60.3 (0.140.012) 2.50.3 (0.10.012) 2 max. (0.08 max.) 1.200.3 (0.0470.012) 0.50.25 (0.020.01) 1812 4.50.35 (0.180.014) 3.20.3 (0.1260.012) 2 max. (0.08 max.) 1.50.35 (0.060.014) 0.50.25 (0.020.01) 2220 5.70.4 (0.220.016) 5.00.4 (0.20.016) 2.5 max. (0.1 max.) 2.250.4 (0.090.016) 0.750.25 (0.030.01) dielectric x7r or c0g/np0 electrical configuration multiple capacitance capacitance measurement at 1000hr point typical capacitance matching better than 5% temperature rating -55c to 125c dielectric withstand volage 2.5 x rated volts for 5 secs. charging current limited to 50ma max. insulation resistance 100gohms or 1000s (whichever is the less) termination material 100% matte tin over nickel advantages replaces 2 or 3 capacitors with one device matched capacitance line to ground on both lines low inductance due to cancellation effect capacitance line to line differential and common mode attenuation effects of temperature and voltage variation eliminated effect of ageing equal on both lines high current capability applications balanced lines twisted pairs emi suppression on dc motors sensor/transducer applications wireless communications audio ground aa bb c1 c1 c2 input 1 input 2 a b d c recommended solder lands 220nf 100nf 47nf 22nf 10nf 4.7nf 2.2nf 1nf 470pf 220pf 100pf 47pf 22pf 0 20 40 60 80 0.1 1 10 100 1000 insertion loss characteristics (common mode) typical 50 ohm system insertion loss (db) frequency (mhz) dimensions mm (inches) chip size a b c d 0603* 0.6 (0.024) 0.6 (0.024) 0.4 (0.016) 0.2 (0.008) 0805 0.95 (0.037) 0.9 (0.035) 0.3 (0.012) 0.4 (0.016) 1206 1.2 (0.047) 0.9 (0.035) 0.6 (0.024) 0.8 (0.03) 1410 2.05 (0.08) 1.0 (0.04) 0.7 (0.028) 0.9 (0.035) 1812 2.65 (0.104) 1.4 (0.055) 0.8 (0.03) 1.4 (0.055) 2220 4.15 (0.163) 1.4 (0.055) 1.2 (0.047) 1.8 (0.071) integrated passive components balanced line emi chip notes * the 0603 chip size is a development item. all technical information should be considered provisional and subject to change. refer to sales office. filtsmx2y.ver2
x2y 0805 1206 1410 2220 *0603 cap value c1 (20%) cap code 100 10pf 5pf 120 12 6 150 15 7.5 180 18 9 220 22 11 270 27 13.5 330 33 16.5 390 39 19.5 470 47 23.5 560 56 28 680 68 34 820 82 41 101 100 50 121 120 60 151 150 75 181 180 90 221 220 110 271 270 135 331 330 165 391 390 195 471 470 235 561 560 280 681 680 340 821 820 410 102 1.0nf 0.5nf 122 1.2 0.6 152 1.5 0.75 182 1.8 0.9 222 2.2 1.1 272 2.7 1.35 332 3.3 1.65 392 3.9 1.95 472 4.7 2.35 562 5.6 2.8 682 6.8 3.4 822 8.2 4.1 103 10 5 123 12 6 153 15 7.5 183 18 9 223 22 11 273 27 13.5 333 33 16.5 393 39 19.5 473 47 23.5 563 56 28 683 68 34 823 82 41 104 100 50 124 120 60 154 150 75 184 180 90 224 220 110 274 270 135 334 330 165 394 390 195 474 470 235 564 560 280 684 680 340 824 820 410 105 1f 0.5f 125 1.2 0.6 1812 cap value c2 (20%) c0g x7r c0g x7r c0g x7r c0g x7r c0g x7r c0g x7r reeled 178mm (7?) 4000 3000 2500 2000 1000 1000 quantity 330mm (13?) 16000 12000 10000 8000 4000 4000 50v 100v 100v 100v 100v 100v 100v 50v 100v 100v 100v 100v integrated passive components balanced line emi chip notes * the 0603 chip size is a development item. all technical information should be considered provisional and subject to change. refer to sales office. voltage 100v 50v 25v 16v filtsmx2y.ver2
x2y the syfer balanced line emi chip has a unique internal architecture which provides unbeatable emc performance for dual line data transmission. c1 line a line b c1 c2 the balanced line emi chip replaces decoupling capacitors or 3 terminal feedthrough chips on a 1 for 2 basis and provides line to line (differential mode) decoupling. fig 2. the internal structure furnishes a reduced inductance when compared to that of a conventional capacitor. this is a result of the novel internal electrode structure which inherently reduces the inductance by the cancellation effect of opposing currents in close proximity. the capacitance line to ground (common mode) is closely matched due to the symmetry within the design. as the device includes line to ground capacitance for both lines, any temperature, ageing and voltage effects will have an equal influence on both lines therefore maintaining balanced decoupling. the construction also allows a capacitance between lines as well as to ground as shown in fig 3. input 2 input 1 input 3 input 4 chip capacitors earth tracks input 2 input 1 input 3 input 4 3 terminal chips earth tracks balanced line emi chip earth tracks input 2 input 1 input 3 input 4 fig 1 fig 2 fig 3 c2, the line to line capacitance, is half the line to ground capacitance thus providing coupling of high frequency interference between balanced lines. because the part acts as a decoupling device, the current limitations of a standard 3 terminal chip do not apply. the single line 3 terminal feedthrough chip carries the signal current through the very thin feedthrough electrodes within the device which have limited dc resistance and so can cause excessive heating, hence the maximum permissible current is often limited to around 300 ma for a 1206 device. the dual line 3 terminal chip is in by-pass across two lines and so is unaffected by high signal currents. table 1 offers a comparison of decoupling devices and demonstrates how the balanced line emi chip extends the options for emc circuit protection. component advantages disadvantages applications requires 1 per line by-pass chip capacitor industry standard high inductance low frequency capacitance matching problems 3 terminal feedthrough feedthrough feedthrough lower inductance current limited unbalanced lines high frequency very low inductance by-pass replaces 2 (or 3) components balanced lines balanced line negates the effects of not for unbalanced signal lines high frequency emi chip temperature, voltage and ageing dc electric motors provides both common mode and differential mode attenuation table 1 a typical application for dual line data transmission would see a board layout using decoupling chip capacitors or 3 terminal feedthrough chips as shown in fig 1. integrated passive components balanced line emi chip filtsmx2y.ver2
ordering information 1206 chip size reference j termination j = nickel barrier y = flexicap? 100 voltage 016 = 16 volts 025 = 25 volts 050 = 50 volts 100 = 100 volts 0222 capacitance expressed in picofarads (pf). first digit is 0. second and third digits are significant figures of capacitance code. the fourth digit is number of zeros following. example: 0222=2200pf. m tolerance m= 20% x dielectric c = c0g x = x7r t packaging t =178mm (7?) reel r =330mm (13?) reel b =bulk e03 balanced line emi chip integrated passive components balanced line emi chip x2y application note one of the significant features of this product is its extremely low inductance, making it particularly suitable for high speed digital applications and for reduction of common mode currents for power line applications. inductance cancellation, due to the effect of opposing current flow across the device, results in a typical line to line inductance of around 100ph, with a corresponding line to ground inductance of 50ph. the balanced line emi chip satisfies the need for high speed communications systems using balanced lines or twisted pairs offering low inductance (therefore high frequency operation), reduced board space, reduced component count and an unparalleled performance. syfer technology are able to provide comprehensive applications and design in support. technical and application papers are available on request from the sales office. manufactured in the uk by syfer technology limited under licence from x2y attenuators llc. filtsmx2y.ver2


▲Up To Search▲   

 
Price & Availability of 1206J0500104MXRE03

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X